Optical communication networks have been implemented to enable increased data rates in links providing point to point communication. For example, optical communication links may be implemented in Synchronous Optical Network/Synchronous Digital Hierarchy (SONET/SDH) and 10 Gigabit Ethernet systems. At a receiving end of such an optical communication link, a photodiode may generate a current in response an optical signal received from an optical transmission medium (e.g., fiber optical cabling). A transimpedance amplifier (TIA) typically converts the current generated by the photodiode into a voltage signal that is then processed. For example, the voltage signal may be processed by clock and data recovery circuitry to recover data transmitted in the optical signal.
As shown for example in FIG. 1, a typical optical transceiver integrated circuit (IC) may use an analog approach to determine the input decision level. Light 100 strikes a light sensitive device, such as a photodiode 102 to produce an input current signal 104 to a TIA 106. The TIA 106 may convert the current signal 104 to an output voltage signal 108. The output voltage signal 108 may be fed back through a simple RC filter circuit comprising resistor 110 and capacitor 112 to derive an average level of an input data stream 104 which can be served as the decision level 114 for the TIA 106. This approach works as long as a continuous stream of 8/10B encoded DC-balanced data is applied to the input 104. 8/10B refers to a line code that maps 8-bit symbols to 10-bit symbols to achieve DC-balance.
However, in a PC/Server like environment, power management is very important from the system perspective. In order to save power, the optical transceiver IC needs to get into certain sleep states while there is no input signal 104. That is, the input is not a continuous stream at all time anymore, and problems are raised for the typical analog approach.
While using the RC filter circuitry, the decision level 114 droops over time due to the leakage current through the capacitor 112 (˜up to few μs range). The change of the decision level 114 may lead to significant errors depending on the capacitor value 112.
However, the decision level 114 needs to be correct as soon as the transceiver recovers from a sleep state (which can be from few μs to several seconds) in order to function properly. Thus, in a PC/Server environment where power management may be an issue a different approach would be desirable.